ARM3

Historia

The next iteration of the ARM processor came in the form of the ARM3. Offering a 4KiB unified cache, plus increased clock speeds (usually 25MHz, although some 33MHz parts exist), it was compatible enough for a carrier board to be designed to plug in where an ARM2 used to be, giving an older machine an instant resurrection as something new. The ARM3 adds the SWP instruction, which is a atomic instruction to swap data between registers and memory and is guaranteed not to be interrupted (unlike the corresponding LDR/STR sequence) so it may be used for system semaphores. The first machine to use the ARM3 onboard was Acorns A5000 (1991) and the A4 laptop (1992, although the A5000 design is derived from the A4!). Clocking at 25MHz (24MHz for the A4), the machine offers around 13.5 MIPS, which is about what youd expect for the difference in clock speed. The Alpha versions of the A5000 (clocked at 33MHz) offer nearly 18 MIPS. By way of comparison, an Intel 80386DX clocking 25MHz provides 8.5 MIPS, while the higher power (and phenomenally expensive in its day) 80486(any version) generally offered around 20 MIPS at 25MHz.